SOC Platform

Our Generic SOC platform takes the open source revolution to the next level

Generic SOC platform :

gSOC’s  Generic SOC platform is  a comprehensive and configurable SOC solution. It includes design, verification and emulation layers, which enable our customers to significantly expedite SOC development.

The gSOC platform takes the open source revolution from scattered IP’s to a full SOC project. In its basic configuration it is a high performance MCU, targeted to a wide range of potential markets.

The platform provides all the frontend aspects of a full SOC project.

It is comprised of the following layers :

SOC RTL design

Verification environment

based on SV UVM

Emulation platform

based on generic FPGA

The gSOC platform offers 3 packages:

We’ve got you covered, with a variety of packages that enable you to meet your specific needs.

You can choose a pre-configured, fabrication-only package, where you simply assimilate your selected process library and analog models and you are good to go. Or, at the other end of the scale, you can customize every aspect of the design to suit all of your company’s unique operational requirements.

  • To Go
    Our To Go solution allows for quick and easy implementation, so you can hit the ground running. Choose this option if the gSOC base- configuration matches your requirements.
  • Hybrid
    Our Hybrid solution allows for partial customization. With this engagement option, you can just add your company’s own internal IP for an optimized SOC solution that will be market-ready in no time.
  • Custom
    Want a tailored solution suited to your precise specifications? Our Custom model offers exceptional versatility, enabling you to benefit from an SOC designed to perfectly meet your operational needs.

gSOC Platform – MCU Features

  • Management CPU cluster
    • Bootup CPU
    • House-keeping tasks, – low power sleep mode
    • Low power RISC-V cpu – 32 bit , 4 stage pipeline
    • UART , I2C , SPI master , SPI slave , 4xTimer , WD
  • Application CPU cluster –
    • 32 bit RISC-V CPU , 2-way superscalar , 9 stage pipe line with dual thread capability
    • 3 CoreMarks/Mhz ,
    • 67 mm@16nm
    • Auxiliary interface – UART , SPI , I2C , GPIO, Timer , WD timer
  • CNN cluster
    • Deep learning inference accelerators
    • Highly configurable
    • Example configuration @ TSMC 16 NM – 1 GHZ  , 2.4 mm2 ,  1 DL TOPS/W
  • External connectivity
    • Ethernet high-speed connection ( 10, 10 , 1000 Mhz)
    • DRAM
    • Flash
  • Customer IP cluster – ready for customer integration
    • Dedicated AXI master, with 64bit data bus
    • Dedicated APB slave
    • 16 GPIO connection to device PAD’s
    • 4 output interrupts
  • gSOC IP cluster – details provided under NDA
  • Security cluster – in development
    • Provide secure boot
    • Enabler for silicon root of trust device
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