GSOC Solution announced the successful completion of a verification project for its customer, RAAAM.
RAAAM Memory Technologies, a start-up company that has developed the next generation on-chip memory solution, successfully leveraged GSOC Solutions’ advanced verification infrastructure and engineering expertise, to validate both its proprietary Gain-Cell RAM (GCRAM) IP and its complex System-on-a-Chip (SoC) design used to validate it.
RAAAM’s patented GCRAM technology delivers up to 50% silicon area reduction and up to 10x lower power consumption compared to conventional SRAM, all while maintaining full compatibility with standard CMOS processes. To ensure the robustness and reliability of this breakthrough memory within their SoC, RAAAM relied on GSOC Solutions’ comprehensive verification services.
GSOC deployed a scalable SystemVerilog UVM-based environment designed for SoC development. The infrastructure included pre-verified Verification IPs (VIPs) for common interfaces, automated simulation and regression scripts, and well-defined methodologies that ensured both breadth and depth of testing.
In addition, GSOC provided its in-house UVM based VIP generation framework, enabling seamless IP-to-SoC reuse and promoting a clear, modular, and maintainable verification environment.
The outcome was a quick ramp up bringing up the initial verification environment and running the first tests in under a week.
Over the course of the project, GSOC’s disciplined and methodical approach resulted in full functional validation of both the GCRAM IP and the complete SoC. From performance verification to integration stability, every aspect was verified to meet stringent quality and reliability standards. The project concluded with an on-time, high-quality Tapeout that met all design targets.
Eran Rotem, VP R&D at RAAAM Memory Technologies, commented, “GSOC’s verification infrastructure played a key role in our SoC development. Their team’s proficiency enabled us to build our environment quickly, begin testing early, and maintain confidence in the quality of our design throughout the process.”
Yonatan Shoshan, Head of Chip Design at RAAAM, added, “GSOC allowed us to focus on our core design goals, knowing that verification was in expert hands. Their team enabled fast development cycles and immediate feedback, which greatly supported our design team’s efficiency.”
Itai Nadler, GSOC CEO, stated, “This project demonstrates the value we provide to our customers through a combination of state-of-the-art design and verification methodologies, our generic and configurable SOC platform and, high-quality engineering services . We’re proud to support leading-edge companies like RAAAM in bringing innovation to the market”.
